UT-H05 Passive Probe digital The FPGA+MCU+ADC architecture ensures strong

The FPGA+MCU+ADC architecture ensures strong waveform capture and supports waveform saving

5A current clamp

synchronization header detection

Ideal for wireless communication development

and microwave testing

UT-H05 Passive Probe digital The FPGA+MCU+ADC architecture ensures strongThese characteristics apply to a UT H00 series probe installed on a specified oscilloscope. When used with another instrument. The oscilloscope must have an input impedance of 1 M. The instrument must have a warm up period of at least 20 minutes and be in an environment that does not exceed the limits. User guide UT H00 Series UT H01 25MHz UT H03 60MHz UT H04 100MHz UT H05 200MHz